5. Hardware

This section describes the hardware-related Frequently Asked Questions.

5.1. Can I Supply a Load (Such as a Sensor, LED, Flash Memory, etc.) from the Output of the DC-DC when Boost Mode is Active?

Yes. Table 12 in the DA14531 datasheet specifies the maximum load current that the DC-DC can supply at various output voltages. In boost mode the DC-DC output is used to power the clamps, POR circuit, read/write the OTP and drive the GPIO’s. If the OTP is not being read/written and the GPIO’s are not being driven, then at least 95% of the output current capability is available to supply an external load. Note that during boot no more than 50 μA should be drawn from the VBAT_HIGH rail (see Table 4 in the DA14531 datasheet). This may mean that the load will have to be connected to a GPIO rather than directly to the output of the DC-DC.

5.2. Is it Possible to Create a Two-Layer Board ?

Yes. No micro-vias are needed for both packages. The application note DA14531 Hardware Guidelines gives examples with 4-layer PCB, but this can be reduced to two layers. The middle layers are only used to interconnect the top and bottom layer.

5.3. When Does Bypass Mode Make Sense?

Bypass mode can be used when the lowest power consumption is not important. Bypass mode prevents use of the DC-DC Inductor. This saves $0.02 and reduces the board size!

See the following two(2) hardware design examples for DA14531 QFN/Bypass and DA14531 WLCSP/Bypass configurations.

In the software side, the CFG_POWER_MODE_BYPASS macro should be defined in the da1458x_config_basic.h file.

5.4. Can I NOT Use External 32 kHz Crystal as a Low Power Clock?

The 32 kHz crystal is “truly” optional. Internal RCX can be used as Low Power Clock (LPC) instead of 32 kHz crystal.

In SDK6.0.14, the Low Power Clock can be selected by setting the CFG_LP_CLK macro in da1458x_config_advanced.h to one of the following values:

  • LP_CLK_XTAL32 //External XTAL32 oscillator

  • LP_CLK_RCX20 //Internal RCX20 clock

  • LP_CLK_FROM_OTP //Use the selection in the corresponding field of OTP Header

5.5. Can I Program the External FLASH with 2-wire UART?

Yes. Figure 32 in document DA14531 Getting Started shows the Jumper configuration to program the external SPI FLASH through 2-wire UART. In addition, application note DA14531 Booting Options describes different boot options with serial interfaces such as I2C, UART, SPI and how to program a firmware into Flash, EEPROM and OTP.

5.6. How Can I Burn the SPI Flash with the DA145xx Development Kit?

Use the Flash Programmer from SmartSnippets toolbox. There are three options available:

  1. Use JTAG. Figure 30 in document DA14531 Getting Started shows the Jumper configuration to program the SPI FLASH through JTAG. Use default Pin configurations.

  2. Use 1-Wire UART either via P05 or P03.

  3. Use 2-Wire UART. Figure 31 in document DA14531 Getting Started shows the Jumper configuration to program the SPI FLASH with 2-wire UART.

You can also refer to the ezFlashCLI tool to flash DA14531. The ezFlashCLI tool relies on the Segger J-Link™ library to control the Smartbond SWD interface.

In case of the DA14531 TINY Module , the Dialog Smartbond™ Flash Programmer can be used as well. It is available for Windows OS , Linux OS and mac OS . Please see the user manual .

5.7. Which Retention-RAM Blocks can be Retained in DA14531?

DA14531 has three (3) RAM cells that can be retained individually. If the CFG_CUSTOM_SCATTER_FILE macro is undefined in da1458x_config_advanced.h file, then the system will calculate which blocks to retain based on the default SDK scatter file and the size of the current image.

  • RAM3 block is always retained, since it contains data that are used from ROM and needs to be retained.

  • RAM1 holds the IVT so it needs to be retained, thus if an image is small enough to fit into RAM1 it is possible to power off RAM2 cell.

_images/da14531_ret_ram.png

Figure 8 DA14531 Retention-RAM

5.8. Does Programming the DA14531 from 2-wire UART Disable the Reset Functionality on P0_0?

No, the RESET function is assigned by default to pin P0_0.

The reset functionality can be disabled via the HWR_CTRL_REG by application as soon as user firmware is running. The default function of the P0_0 is the HW reset, when the booter is running the reset functionality is disabled from the booter when the sequential scanning is running and P0_0 is used as an interface pin.

As soon as the user software is downloaded the booter will re-enable the reset function.

5.9. Can the DA14531 in the WLCSP Package be Configured to Boot from External SPI Flash and Still have the UART and RESET Functionality?

It is better to use JLINK to program such a condition. The RESET function can be based on power-on-reset or change to another pin. The CSP package has less pins than the WLCSP package so, it is hard to support all functions together. In addition, application note DA14531 Booting Options describes the different boot options that use serial interfaces such as I2C, UART, SPI and how to program a firmware into Flash, EEPROM and OTP.

5.10. What are the Expected Power Consumption Values for DA14531?

See Section 3.3 DC Characteristics in the DA14531 datasheet.

5.11. What is the OTP configuration script?

The OTP configuration script is used to program registers with values that are defined during production, testing, to store user trim values for the application software and to define the UART time-out timer during boot. The OTP configuration script is executed by the Booter to prepare and initialize the system before the CPU starts to run the application code. See section 4.4.2 Configuration Script in the DA14531 datasheet.

5.12. How Can the SPI Operate at 32 MHz (Fast Boot)?

The SPI Flash operates at 2 MHz by default. However, a specific configuration script command can be used to overwrite the default 2 MHz clock speed of the SPI boot path and set the clock speed to 32 MHz.

5.13. Can an External Processor Control the DA14531?

Yes, it is possible. There are two (2) possibilities where an external processor can control the DA14531.

  1. Over GTL, which is a Dialog proprietary protocol.

See Section 1.4.2. External Processor in UM-B-119: DA14585-DA14531 SW Platform Reference. The SDK includes two projects for this kind of applications namely prox_reporter_ext and prox_monitor_ext. Both are located under the projects\target_apps\ble_examples SDK path.

See also the UM-B-143 Dialog External Processor Interface user manual that provides all necessary information to create GTL based applications. It includes detailed description of the Generic Transport Layer protocol (GTL), the messages exchanged as well as sequence flow diagrams for protocol operations.

Please also refer to the Booting the DA14531 with Codeless Through a STM32 and STM32 SUOTA via DA14531 .

  1. Over HCI, which is a standard Bluethooth SIG protocol.

The SDK includes a project for HCI applications and can be found in projects\target_apps\hci SDK path.

5.14. Is the DA14531 FCC Certified?

Yes, the DA14531 SoC is certified. See the following links:

  1. DA14531 EN 300 328 certification test report (WLCSP)

  2. DA14531 EN 300 328 certification test report (QFN)

5.15. How I can Find Schematics Symbols and PCB Footprints in Any Format?

Schematic symbols and PCB footprints for DA14531 are available on the SnapEDA website:

https://www.snapeda.com/search/?q=DA14531&search-type=parts

After sign up, you can download these in just about any format (Altium, Orcad, Eagle, etc.) for free! Both the QFN and CSP variants are supported.

5.16. Can I Use a DA14531 Development Kit (USB or PRO) to Debug my Custom Hardware?

Yes, see Section 18 in the Getting Started with SDK6 (HTML) .

More details about the USB and PRO DKs can be found in the Development Kit-USB and Development Kit-Pro user manuals.

Please also check the Quick Started Guide with the USB Development Kit and Getting Started with the Pro Development Kit (HTML) documents.

5.17. Does Dialog Offer a DA14531 Module?

Yes, Dialog offers the module DA14531 SmartBond TINY™ Module - see the product page below :

The DA14531 SmartBond TINY™ Module, based on the world’s smallest and lowest power Bluetooth® 5.1 System-on-Chip, brings the DA14531 SoC advantages to an integrated module. It requires a power supply and a printed circuit board to build a Bluetooth® application.

The module is targeting broad market use and will be certified across regions providing significant savings in development cost and time-to-market.

It comes with an integrated antenna and easy to use software making Bluetooth® Low Energy development easier than ever before.

This awesome combination takes mobile connectivity to applications previously out of reach, enabling of the next billion IoT devices, with SmartBond TINY™ at their core.

Please check the TINY module datasheet and the Getting Started guide .

5.18. What is the Expected Power Consumption for the DA14531 Module?

See Table 4: DC Characteristics in the TINY module datasheet .