4. List of Figures¶
Figure 1 - SmartSnippets™ Toolbox ribbon menu
Figure 2 - Tools available for DA14580/581/583 chip family
Figure 3 - Tools available for DA1468x chip family
Figure 4 - Tools available for DA14585/6 chip family
Figure 5 - Tools available for DA1469x chip family
Figure 6 - Example of error on loading a library
Figure 8 - Virtual COM port selection.
Figure 12 - Advanced settings for COM port.
Figure 13 - Settings and port selection actions.
Figure 15 - Support Pack Configuration.
Figure 16 - Sdk validation failure.
Figure 17 - Board setup screen.
Figure 18 - Single UART communication.
Figure 19 - DA14580/581/583 chip connected over JTAG.
Figure 20 - DA1468x chip connected over UART.
Figure 21 - Communication could not established..
Figure 22 - Receiving debug data from UART.
Figure 23 - Power Profiler run snapshot.
Figure 24 - Power Profiler while capturing data.
Figure 25 - Power Profiler while capturing data with proper zooming.
Figure 26 - Power Profiler software cursors.
Figure 27 - Power Profiler configuration HW Settings.
Figure 28 - Power Profiler configuration Chart Settings.
Figure 29 - Clear Power Profiler calibration offset.
Figure 30 - Note the ‘Avg Current (mA)’ value.
Figure 31 - Set the new Power Profiler calibration offset value.
Figure 32 - Sleep Mode Advisor.
Figure 34 - Warning when writing zeroes on non-zero memory location.
Figure 35 - Request permission to burn the header field.
Figure 36 - Proceed write OTP Header.
Figure 37 - OTP Header of a DA14580/581/583 family chip.
Figure 40 - OTP Header of a DA1469x family chip.
Figure 38 - OTP Header of a DA1468x family chip.
Figure 39 - OTP Header of a DA14585/6 family chip.
Figure 41 - Warning popup when user tries to burn over protected field..
Figure 42 - Cache Architecture Settings.
Figure 43 - Serial Configuration Mapping.
Figure 44 - Manage Configuration Script dialog.
Figure 45 - Register Configuration in CS.
Figure 46 - Trim/Callibration values in CS.
Figure 47 - Booter value in CS.
Figure 48 - Disabling development mode in CS.
Figure 49 - Specifying Uart STX timeout in CS.
Figure 50 - DA14580/581/583 Header validation tests.
Figure 52 - SPI Flash Programmer.
Figure 53 - SPI save memory to file.
Figure 54 - EEPROM Programmer.
Figure 55 - EEPROM Programmer erase.
Figure 56 - EEPROM save memory to file.
Figure 57 - Program SPI/EEPROM wizard: Intro page.
Figure 58 - Program SPI/EEPROM wizard: Work-flow.
Figure 59 - Program SPI/EEPROM wizard: Encryption page.
Figure 60 - Program SPI/EEPROM wizard: Multi image page.
Figure 61 - Program SPI/EEPROM wizard: Bootloader page.
Figure 62 - Program SPI/EEPROM wizard: Offsets page.
Figure 63 - Proprietary Header Programmer.
Figure 64 - Header model format.
Figure 65 - Software patch over the air (SPOTA).
Figure 66 - SPOTA Emulator selection.
Figure 67 - SPOTA I2C options.
Figure 68 - SPOTA SPI options.
Figure 70 - Software update over the air (SUOTA).
Figure 71 - Error on downloading the same firmware file twice.
Figure 72 - Data Rate Monitor connection successful.
Figure 73 - Data Rate Monitor - Start Transmission.
Figure 74 - QSPI Flash Programmer.
Figure 75 - QSPI NVPARAMS Programmer.
Figure 76 - QSPI NVPARAMS Programmer log.
Figure 77 - QSPI Partition Table.
Figure 78 - QSPI Layout Controller.
Figure 79 - Select a section to view.
Figure 80 - View of the ‘Backup Product Header’.
Figure 81 - Change default flash params.
Figure 82 - Add Firmware Image to QSPI.
Figure 83 - Prepare QSPI Firmware Image.
Figure 85 - Extra RF Master’s Ribbon.
Figure 87 - Sample log output for LE Tx Command.
Figure 89 - Sample log output for LE Rx Command.
Figure 90 - Unmodulated Tx/Rx.
Figure 91 - Sample log output for unmodulated Tx Start command.
Figure 92 - Sample log output for unmodulated Rx Start command.
Figure 93 - Sample log output for unmodulated Stop command.
Figure 95 - Sample log output for Continuous Tx Start command.
Figure 96 - Sample log output for Continuous Tx Stop command.
Figure 98 - Sample log output for XTAL read command.
Figure 100 - Battery Lifetime Estimator.
Figure 101 - Connection and Advertising Interval validation.
Figure 102 - Default Terminal Scripting menu.
Figure 103 - Terminal Window and Command Prompt.
Figure 104 - Firmware download.
Figure 105 - Batch file loader.
Figure 106 - CSV file formatter.
Figure 107 - Console Settings.
Figure 109 - Settings for Terminal Scripting.
Figure 110 - Log apply filter menu.
Figure 111 - Log apply filter system messages.
Figure 112 - Working with multiple settings files.
Figure 113 - Select SDK root as SmartSnippets™ Studio workspace.
Figure 114 - SDK tools wizard.
Figure 115 - Browse for plt_fw project location inside SDK.
Figure 116 - Import plt_fw project.
Figure 117 - Build plt_fw project.
Figure 118 - Browse for plt_fw binary.
Figure 119 - Keil workspace after prod_test project load.