UART with DMA flow control
ID: LPCBARESDK-200
Status: Open
First reported: 6.0.8.509
Fixed in: TBD
Description
The following configuration for UART/UART2 fails to operate correctly:
FIFO enabled
DMA enabled
HW flow control enabled
RX FIFO trigger level != 0
Workaround
This is a HW design issue. Issue has been fixed in DA14531, but it would not be fixed in DA14585, DA14586.